Differential latch sense amlifiers using feedback
US5504443A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 7, 1994 |
| Grant date | Apr 2, 1996 |
| Priority date | — |
| Expiry date | Sep 7, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/062
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A differential latch sense amplifier for memories has (a) a first differential input circuit for detecting and shifting the voltage levels of the first and second input signals and coupled to first and second sense nodes, (b) a cross-coupled latch for providing gain to the first and second sense nodes, (c) a precharge circuit for precharging and equalizing the first and second sense nodes, (d) a first tristatable output driver for providing a first feedback, for outputting the voltage of the first sense node to a first output node, and for receiving data, (e) a second tristatable output driver for providing a second feedback, for outputting the voltage of the second sense node to a second output node, and for receiving data, and (f) a first feedback circuit for increasing the voltage gain and decreasing the sense output response time at the first and second sense nodes and for being controlled by the first and second tristatable output drivers. The feedback circuit is coupled to the first and second tristatable output drivers in such a way that the feedback circuit is disabled during a standby period or between read or write cycles. To minimize layout area, the differential latch s…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.