Branch prediction device enabling simultaneous access to a content-addressed memory for retrieval and registration
US5504870A · kind A · utility
9Cited by
8References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 23, 1995 |
| Grant date | Apr 2, 1996 |
| Priority date | — |
| Expiry date | May 23, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3844
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The branch prediction device of this invention is for use in a pipeline processor where a plurality of instructions are simultaneously processed in various stages, such as the fetch stage, execution stage, memory access stage and register write stage. A two-port branch prediction buffer enables simultaneous operation of the registration and retrieval processes so that a previously registered address can be obtained during the same clock pulse as registration of another branch address occurs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.