Memory apparatus having programmable memory time slots
US5504876A · kind A · utility
4Cited by
5References
10Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Apr 28, 1994 |
| Grant date | Apr 2, 1996 |
| Priority date | — |
| Expiry date | Apr 28, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A programmable memory cycle is entered on a keyboard and set by a remote system control processor. Each local processor controls access to memory boards in accordance with the set memory cycle. When the memory cycle is divided into four memory access slots, the processor can provide, in each memory cycle, three read slots and one write slot, two read slots and two write slots, or one read slot and three write slots. When used for processing video signals, the arrangement can process three video channels, or more if expanded by the provision of further memory boards and local processors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.