Queue memory with self-handling addressing and underflow
US5504913A · kind A · utility
3Cited by
13References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 14, 1992 |
| Grant date | Apr 2, 1996 |
| Priority date | — |
| Expiry date | May 14, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F5/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention reduces the overhead commonly associated with computer queues by not requiring direct addressing of each location in the queue and by not requiring specialized underflow logic. Furthermore, reads and writes to the computer queue of the present invention can be asynchronous. Lastly, the computer queue of the present invention requires less circuitry and is thus physically smaller, requires less power to operate and can operate more quickly than can queues of the prior art.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.