Offset-compensated sample and hold arrangement and method for its operation
US5506526A · kind A · utility
14Cited by
3References
7Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 17, 1994 |
| Grant date | Apr 9, 1996 |
| Priority date | — |
| Expiry date | Oct 17, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/303
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Offset-compensated sample and hold arrangement to sample an input signal comprising at least an operational amplifier (A), a first capacitor (C1), a second capacitor (C2), a first switch (S110), a second switch (S211), a third switch (S210), a fourth switch (S111), a fifth switch (S120), a sixth switch (S121), a seventh switch (S220) and an eighth switch (S221), which switches capacitors and operational amplifier are interconnected in such a way and may be switched in such a way that during an offset-compensation phase the output voltage will only experience a very small voltage change.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.