Method of forming antifuses having minimum areas
US5508220A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 1, 1993 |
| Grant date | Apr 16, 1996 |
| Priority date | — |
| Expiry date | Jun 1, 2013 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/055
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Antifuses having minimum areas are formed by a process including the steps of forming doped regions in a semiconductor substrate, forming a dielectric layer over the surface of the substrate, performing masking and etching steps to form apertures in the dielectric layer over portions of the doped regions where antifuses are to be formed, depositing a second dielectric layer over the first dielectric layer and the apertures, the second dielectric layer having a faster etch rate than the first dielectric layer, etching the second dielectric layer to leave spacers at the edges of the apertures, forming the antifuse dielectric in the apertures, and forming upper antifuse electrodes over the antifuse dielectric. In another process, a process for forming antifuses includes the steps of forming a dielectric layer over the surface of a semiconductor substrate, forming a first layer of polysilicon over the insulating layer, forming apertures in between portions of the first polysilicon layer where antifuses are to be formed, doping the exposed regions in the substrate using the polysilicon as a masking member, depositing an oxide over the polysilicon regions, etching the oxide to expose the…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.