Semicoductor device having defect type compound layer between single crystal substrate and single crystal growth layer
US5508554A · kind A · utility
23Cited by
2References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 23, 1994 |
| Grant date | Apr 16, 1996 |
| Priority date | — |
| Expiry date | Aug 23, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/824
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a semiconductor device capable of suppressing the generation of dislocations due to the difference in lattice constant by insertion of one or more defect type compound layers in a semiconductor layered structure. The strain generated by the mismatch of the lattice is relaxed by a large amount of vacancies contained in the defect type compound layer, to suppress the generation and the propagation of dislocations, thus inexpensively fabricating a semiconductor device with less deterioration of the characteristics due to defects with good repeatability.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.