Partial response trellis decoder for high definition television (HDTV) system
US5508752A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 23, 1995 |
| Grant date | Apr 16, 1996 |
| Priority date | — |
| Expiry date | Jan 23, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/497
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A partial response Trellis decoder that performs trellis coded modulation in a high definition television (HDTV) having a specific and detailed configuration and includes a distance mapper for calculating first, second, third and fourth Euclidean distances between the input signal and a reference value; a Viterbi decoder for Viterbi decoding the first, second, third and fourth Euclidean distances calculated by the distance mapper; a first delay for delaying and outputting the Yiterbi decoded data for each Euclidean distance; a ruler selector for selecting a ruler type signal based on the signals output by the first delay; and a slicer for slicing the selected ruler type signal and the input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.