Adjacent row shift redundancy circuit having signal restorer coupled to programmable links
US5508969A · kind A · utility
6Cited by
3References
47Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 8, 1993 |
| Grant date | Apr 16, 1996 |
| Priority date | — |
| Expiry date | Jan 8, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/787
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A redundancy circuit for a semiconductor memory device utilizes a fuse ladder comprising alternating programmable resistive fuses and signal restorers connected to one another in series. The signal restorers coupled between the fuses prevent the formation of a high impedance resistive line with a floating node when one of the fuses in the ladder is blown.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.