Programmable logic array and data processing unit using the same
US5511173A · kind A · utility
112Cited by
4References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 5, 1994 |
| Grant date | Apr 23, 1996 |
| Priority date | — |
| Expiry date | Jan 5, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/223
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable logic array includes a plurality of AND planes. Each AND plane executes an AND logic operation and has input terminals and output terminals. The programmable logic array also includes a single OR plane provided in common for the plurality of AND planes. The single OR plane executes an OR logic operation and has input terminals coupled to the output terminals of the plurality of AND planes and output terminals. A data processing unit using the above programmable logic array is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.