Variable sample rate DAC
US5512897A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 1995 |
| Grant date | Apr 30, 1996 |
| Priority date | — |
| Expiry date | Mar 15, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/50
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for digital-to-analog conversion using sigma-delta modulation of the temporal spacing between digital samples are provided. The method and apparatus include sigma-delta modulation of the time-base such that errors produced by non-uniform sampling are frequency-shaped to a high frequency region where they are reduced by conventional filtering techniques. In one embodiment, an oversampling modulator receives digital input samples and, responsive to a noise-shaped clock signal, modulates the digital input samples to produce modulated samples at an oversampling rate. The oversampling rate preferably is equal to an oversampling ratio times a preselected input sample rate. A DAC, coupled to the modulator, converts the modulated samples to an analog signal. A modulator sample rate control circuit, coupled to the modulator, receives a frequency select signal representing the preselected input sample rate, and produces the noise-shaped clock signal for controlling operation of the modulator at the oversampling rate. The control circuit preferably includes a first sigma-delta modulator that sigma-delta modulates the frequency select signal. The oversampling modulator p…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.