Synchronous memory packaged in single/dual in-line memory module and method of fabrication
US5513135A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 2, 1994 |
| Grant date | Apr 30, 1996 |
| Priority date | — |
| Expiry date | Dec 2, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Multiple synchronous dynamic random access memories (SDRAMs) are packaged in a single or a dual in-line memory module to have similar physical and architectural characteristics of dynamic random access memories (DRAMs) packaged in single/dual in-line memory modules. A 168 pin SDRAM DIMM family is presented which requires no modification of existing connector, planar or memory controller components. The 168 pin SDRAM DIMM family includes 64 bit non-parity, 72 bit parity, 72 bit ECC and 80 bit ECC memory organizations. Special placement and wiring of decoupling capacitors about the SDRAMs and the buffer chips contained within the module are also presented to reduce simultaneous switching noises during read and write operations. A special wiring scheme for the decoupling capacitors is employed to reduce wiring inductance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.