Mutlilayered antifuse with intermediate metal layer
US5514900A · kind A · utility
26Cited by
1References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 31, 1994 |
| Grant date | May 7, 1996 |
| Priority date | — |
| Expiry date | Mar 31, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An antifuse structure in an integrated circuit including a first interconnection line, a second interconnection line formed over the first interconnection line, and a plurality of programming layers between the first and second interconnection lines. Each pair of programming layers has a metal layer therebetween which dissolves with the programming layers to form a conducting link during the programming of such antifuse structure. Such antifuse structure may also include a conductive plug between the programming layers and the second interconnection line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.