Method of making BI-CMOS integrated circuit having a polysilicon emitter
US5516718A · kind A · utility
13Cited by
10References
8Claims
0Family size
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Key dates
| Filing date | Oct 25, 1994 |
| Grant date | May 14, 1996 |
| Priority date | — |
| Expiry date | Oct 25, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/124
Abstract
The invention concerns a BI-CMOS process, in which Field-Effect Transistors (FETs) and Bipolar Junction Transistors (BJTs) are manufactured on a common substrate. In several processing steps, FET structures are formed simultaneously with BJT structures. For example, in one step, polysilicon gate electrodes for the FETs and polysilicon emitters for the BJTs are formed simultaneously. In another aspect of the invention, a polysilicon layer is used to reduce channeling which would otherwise occur during an implant step.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.