Digital signal processor for audio applications
US5517436A · kind A · utility
Inventors
Key dates
| Filing date | Jun 7, 1994 |
| Grant date | May 14, 1996 |
| Priority date | — |
| Expiry date | Jun 7, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/325
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A digital signal processor for efficiently handling audio applications is disclosed. The single chip digital signal processor includes an on-chip instruction memory for outputting instructions representing an audio application program. Four busses, W, X, Y and Z, provide communication within the processor. An ALU performs a plurality of arithmetic and logical functions according to the instruction memory. Specialized implementations for functions have been specially developed for audio applications, for example, a single cycle average instruction, a jump on condition code instruction, a repeat instruction, a limit instruction. A Multiplier Accumulator/Barrel Shifter performs a plurality of MAC and shifting functions according to the instruction memory. The MAC/BS is coupled in parallel with the ALU and an Address Generator. The Address Generator performs a plurality of address calculation functions according to the instruction memory. Some of the data storage areas include: 1) a GPR memory for writing data to the X and Y busses and reading data from the Z bus; 2) an AOR memory for writing data to the W, X, and Y busses and reading data from the Z bus; and 3) an SPR memory for writi…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.