Input waiting line system especially provided for connection to the inputs of a blockage-free switching matrix of the spatial type
US5517496A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 1994 |
| Grant date | May 14, 1996 |
| Priority date | — |
| Expiry date | Sep 30, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5681
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A queueing circuit serves an asynchronous switching circuit. A number of input circuits are connected to inputs of a switching network in a one-to-one relationship with the outputs of the switching matrix. During its own time slot, each of the input circuit has a series of availability signals which are assigned to time slots that are later than the input circuit's own time slot. These availability signals indicate the availability condition at the matrix output for enabling an emission of a data cell during the time slot identified by the availability signal. Based upon the availability signal, the cell is released from a memory storage during an available one of the later time slots.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.