Method for testing design timing parameters using a timing shell generator
US5517658A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 4, 1994 |
| Grant date | May 14, 1996 |
| Priority date | — |
| Expiry date | May 4, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/3312
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for testing the timing parameters of a system design is presented, especially suited for use in testing for timing violations between the pins of a semiconductor device. A description of the timing constraints of the various modules of a design is written in a common non-technical vernacular, and functions as an input file. A Timing Shell Generator converts the input file description into a simulator-environment-compatible output code-language file description. The output code-language file is operative to implement the timing constraints of the original input file during simulation such that any violations of the prescribed timing constraints are indicated to the tester who can then take appropriate action.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.