Pulse counter circuit and pulse signal changeover circuit therefor
US5521952A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 7, 1994 |
| Grant date | May 28, 1996 |
| Priority date | — |
| Expiry date | Dec 7, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K21/026
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A pulse counter circuit has an invertor which inverts a pulse signal input thereto to form an inverted signal. One of the pulse signal and the inverted signal is selected in response to a selecting signal, and the selected signal is delivered as an output signal. Changeover of a signal to be selected between the pulse signal and the inverted signal is effected at timing of a change in level of the pulse signal. A counter counts pulses of the output signal. A pulse signal changeover circuit selects one of a pulse signal and an inverted signal obtained by inverting the pulse signal, in response to a selecting signal, and the selected signal is delivered as an output signal. The pulse signal is masked by being held at a predetermined level within a predetermined time period, and the inverted signal is masked by being held at the predetermined level within the predetermined time period. Changeover of a signal to be selected between the pulse signal and the inverted signal is effected within the predetermined time period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.