Patent · US Expired

Coherent transaction ordering in multi-tiered bus system

US5524216A · kind A · utility

6Cited by
8References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 13, 1994
Grant dateJun 4, 1996
Priority date
Expiry dateMay 13, 2014

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/4027
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A computer system has a multi-tiered bus system. The multi-tiered bus system includes one or more local buses and a central bus connected to each local bus by a bus interface. In order to maintain one global view of transaction ordering, the processors on each local bus record bus transactions in an order on which the bus transactions appear on the central bus. To do this, bus transactions which are initiated on any local bus are forwarded to the central bus by the corresponding bus interface. The processors connected to the local bus do not record bus transactions when they are initiated on the local bus. Every transaction which occurs on the central bus is echoed back to every local bus by the corresponding bus interface. Each processor records bus transactions at the time they are echoed back to the local bus.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.