System having different signal transfer modes for detecting and restoring logical levels and blocking operation when restored signal outputs are on a predetermined level
US5524217A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 21, 1993 |
| Grant date | Jun 4, 1996 |
| Priority date | — |
| Expiry date | Apr 21, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4027
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
To enable wired-OR signal lines to be connected without interlock in a bus linkage unit for connecting the bus of a computer system with the bus of an expansion device or the bus of another computer system through a signal transfer path in which the signal mode is different from those of the buses. A shadow register 46 that acts on the level of wired-OR signal line 51 of the other bus is provided in each system. The level of wired-OR signal lines in each system is sent to the shadow register of the other system through a communication path. When the shadow register of the system is at a predetermined level, said system will not send the level of said wired-OR signal line to the other system. Interlock is eliminated by avoiding repetition of level transfer echoes between both systems in this way. Both systems are further provided with a shadow-shadow register 47 for forming a mirror image of the shadow register of the other system. A predetermined level will be sent to the shadow register of the other system based on the nonconformity between the level of the shadow-shadow register in each system and the level of wired-OR signal line of said system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.