Nonvolatile memory card with an address table and an address translation logic for mapping out defective blocks within the memory card
US5524231A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 30, 1993 |
| Grant date | Jun 4, 1996 |
| Priority date | — |
| Expiry date | Jun 30, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/76
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile memory card includes first memory and a second memory. The first memory includes a first block and a second block, each can be addressed by a first block address and a second block address, respectively. The second memory includes a third block and a fourth block, each can be addressed by a third block address and a fourth block address, respectively. An address table is used for storing (1) each of the first, second, third, and fourth block addresses and (2) a first, a second, a third, and a fourth status data, each indicating the operational condition of one of the first, second, third, and fourth blocks, respectively. Each of the first, second, third, and fourth status data can be in a first state and a second state. When a particular one of the first, second, third, and fourth blocks is non-operational, the corresponding one of the first, second, third, and fourth status data is at the first state. An address translation logic is coupled to (1) the address table and (2) the first and second memories for receiving external addresses to access memory locations within the first and second memories, and for converting the external addresses to access the memory locati…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.