Real-time processing of packetized time-sampled signals employing a systolic array
US5524258A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 1994 |
| Grant date | Jun 4, 1996 |
| Priority date | — |
| Expiry date | Jun 29, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8007
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A real-time data processing system employs a control computer which defines a pre-processing arrangement of data channels to speed processing, and an arrangement of output data channels to provide a desired output format. The data channels are samples and arranged into a data packet which is passed to an array of digital signal processors (DSPs) arranged in a series of stages, with at least one DSP per stage. A front-end DSP receives the data packet and appends a control field having commands addressed to specific DSPs to the data packet along with adding a monitor field. The DSPs monitor the control field for commands addressed to it and then executes those. The status of the operation is written in the monitor field and the data packet is passed to DSPs of the next stage for `pipelined` processing. DSPs of the last stage collect the process portions of the data packet, assemble them according to the desired output format and pass on the completed data packet. The system control computer may monitor the monitor field of any data packet and determine the health of each DSP.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.