Semiconductor memory device and method of fabricating the same
US5526306A · kind A · utility
9Cited by
1References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 7, 1994 |
| Grant date | Jun 11, 1996 |
| Priority date | — |
| Expiry date | Jun 7, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C19/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In order to improve the degree of storage data integration, side walls (32) are selectively formed on side surfaces of word lines (22) to serve as masks for changing ON-state current values of memory cells by changing widths or lengths of active regions (24) of the memory cells, thereby forming several of types of memory cells having different electrical properties. Storage data per memory cell is therefore so multivalued that the number of memory cells is reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.