Power-on reset circuit having a low static power consumption
US5528184A · kind A · utility
21Cited by
13References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 28, 1993 |
| Grant date | Jun 18, 1996 |
| Priority date | — |
| Expiry date | Jun 28, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2217/0036
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A power-on reset circuit which employs a supply voltage sensing branch for triggering a first inverter of a pair of cascaded inverters. The intrinsic static consumption of such a POR circuit is strongly reduced by employing a current generator, which is automatically forced to deliver a reduced current during the operation of the integrated circuit, for biasing two transistors functionally connected in said voltage sensing branch into a subthreshold operating condition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.