Flash analog-to-digital converter
US5528242A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 9, 1994 |
| Grant date | Jun 18, 1996 |
| Priority date | — |
| Expiry date | Aug 9, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/365
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A two-step flash ADC includes a MSB reference ladder having a first plurality resistors of resistance r and a second plurality of resistors of resistance R, serially connected together on an alternating basis starting and ending with one of the first plurality of resistors. A LSB reference ladder having a total resistance R.sub.L is initially connected across a predetermined (2r+R) leg of the MSB reference ladder. The resistances r, R, and R.sub.L are selected such that the effective resistance resulting from connecting the LSB reference ladder in parallel with a (2r+R) leg of the MSB reference ladder is equal to a (r+R) leg of the MSB reference ladder. In a first step of the two-step flash ADC, MSB reference voltages are picked-off the MSB reference ladder from actual or effective (r+R) legs of the MSB reference ladder, compared against an analog input voltage, and used to generate the most-significant-bits of a digital number corresponding to the analog input voltage. In a second step of the two-step flash ADC, the LSB reference ladder is connected to a portion of the MSB reference ladder determined by the analog input voltage, LSB reference voltages are picked-off the LSB refere…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.