Timing circuit for video display having a spatial light modulator
US5528317A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 27, 1994 |
| Grant date | Jun 18, 1996 |
| Priority date | — |
| Expiry date | Jan 27, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N9/30
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for synchronizing display timing in a digital television system with a pixel addressable display having a color wheel is disclosed. The display timing circuit 22 includes phase comparator 40, for comparing the phase of a wheel index signal generated by a color wheel 20 with the phase of a frame synchronization signal indicating that a complete frame is ready to be displayed. Display timing circuit 22 further comprises a color wheel synchronization generator 42 which generates a color wheel synchronization signal in response to a phase difference value produced by phase comparator 40. The color wheel synchronization signal is used to increase, decrease, or maintain the speed of color wheel 20 to achieve a known phase relationship between the frame synchronization signal and the wheel index signal. Display timing circuit 22 further comprises a clock generator applicable to generate a display master clock signal having a known frequency relation to the wheel index signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.