System and method for implementing fast high addressability error diffusion process
US5528384A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 3, 1994 |
| Grant date | Jun 18, 1996 |
| Priority date | — |
| Expiry date | Aug 3, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N1/4053
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method and system implements a high addressability characteristic into an error diffusion process. A grey level value representing a pixel is received. The grey level value is interpolated to generate subpixel grey level values which correspond to a second resolution. A threshold circuit thresholds the interpolated grey level value. In parallel to the interpolation circuit and threshold circuit is an error circuit which generates a plurality of possible error values. One of the plurality of possible error values is selected based on the number of subpixels exceeding a threshold value. A portion of the selected error value is then diffused to adjacent pixels on a next scanline.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.