High speed memory packaging scheme
US5530623A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 19, 1993 |
| Grant date | Jun 25, 1996 |
| Priority date | — |
| Expiry date | Nov 19, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10159
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A memory packaging scheme for high speed computer systems includes, several memory module sockets mounted to a printed circuit board and interconnected by a common set of address, data and control transmission lines within the printed circuit board. The transmission lines are interrupted at each connector. Cooperating memory modules, such as SIMM memory modules are installed in sequence into one or more of the module sockets in accordance with the requirements of the computer system. Installation of a memory module into a memory socket closes the open circuits for each one of the transmission lines at the memory socket, extending the uninterrupted length of the transmission lines to the next memory socket in the sequence. The memory socket and cooperating memory module design thus provides for sizing of the memory board transmission line lengths to accommodate the number of memory modules installed into memory board sockets, thereby eliminating undesirable transmission line effects from occurring within the printed circuit board transmission lines connecting the memory modules.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.