Method and apparatus for switching of duplexed clock system
US5530726A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 6, 1994 |
| Grant date | Jun 25, 1996 |
| Priority date | — |
| Expiry date | Jun 6, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0083
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A duplexed clock switching apparatus of the present invention includes two oscillators constantly working for outputting clock signals, wherein a phase of the stand-by clock signal is kept synchronized to the phase of the clock signal selected from the output signal of the oscillator to be supplied to the apparatus. Each of the duplexed clock switching apparatus of the present invention includes a clock signal generator for generating clock signals of a predetermined frequency independently; a clock selector for receiving clock signals generated by all clock signal generators and selecting one of them; a phase synchronization circuit for synchronizing a phase of a clock signal generated by the clock signal generator to the phase of the selected clock signal; and a clock switching circuit for switching an outputted clock signal to the selected clock signal. With reference to the phase synchronization circuit, it is desirable to include a phase-locked-loop (PLL) circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.