System and method for prefetching data from a main computer memory into a cache memory
US5530941A · kind A · utility
35Cited by
15References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 6, 1990 |
| Grant date | Jun 25, 1996 |
| Priority date | — |
| Expiry date | Aug 6, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/6022
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for transferring data elements from a computer main memory to a cache memory. The main and cache memories are accessible by a host processor and other bus masters connected thereto by a bus. Code data elements to be read by the host processor are predicted. The predicted code data elements are then transferred from the main memory to cache memory without delaying memory access requests for data from the other bus masters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.