Cache memory system and method with multiple hashing functions and hash control storage
US5530958A · kind A · utility
119Cited by
1References
25Claims
0Family size
Assignee
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Key dates
| Filing date | Dec 23, 1994 |
| Grant date | Jun 25, 1996 |
| Priority date | — |
| Expiry date | Dec 23, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0864
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A column-associative cache that reduces conflict misses, increases the hit rate and maintains a minimum hit access time. The column-associative cache indexes data from a main memory into a plurality of cache lines according to a tag and index field through hash and rehash functions. The cache lines represent a column of sets. Each cache line contains a rehash block indicating whether the set is a rehash location. To increase the performance of the column-associative cache, a content addressable memory (CAM) is used to predict future conflict misses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.