Semiconductor wafer with alignment marks
US5532520A · kind A · utility
28Cited by
1References
31Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 21, 1994 |
| Grant date | Jul 2, 1996 |
| Priority date | — |
| Expiry date | Jun 21, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/975
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is an alignment mark for the X directional alignment of a chip area on a semiconductor wafer, for example. The alignment mark comprises recesses and projections formed on a semiconductor substrate. The recesses or projections are repeatedly arranged in the X direction. The X directional width of the recesses or projections is set smaller than the X directional width of a grain on a metal film formed on the recesses and projections or the average particle size, as viewed from above the semiconductor substrate. The projections may be formed by a insulating layer formed on the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.