Multilevel converter with capacitor voltage balancing
US5532575A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 6, 1995 |
| Grant date | Jul 2, 1996 |
| Priority date | — |
| Expiry date | Jan 6, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E40/30
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A multilevel convertor having a set of series-connected capacitors and a set of associated series-connected switching elements employs a main control loop which controls some aspect of an AC system, e.g. busbar voltage, by controlling the switching times of the switching elements. The convertor also comprises one or more subsidiary control loops for establishing a desired relationship between mean DC voltage levels on the capacitors. The subsidiary control loops combine first signals proportional to DC voltage levels on the capacitors and second signals proportional to tap currents associated with the capacitor nodes to provide signals which modulate the timing of the switching of switching elements connected to those capacitors which are out of balance, while leaving alone the timing of the switching of switching elements associated with those capacitors which have the required voltage across them. The advantage of the invention is that it prevents the "run-away" of individual capacitor voltages to values grossly in error, the run-away being due either to spontaneous instability or to temporary disturbances.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.