Circuit integrity test system
US5532601A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 15, 1995 |
| Grant date | Jul 2, 1996 |
| Priority date | — |
| Expiry date | Feb 15, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/52
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A system for testing the integrity of critical circuitry, lines and wires employs a differential amplifier having an input resistance R.sub.in and a feedback loop with a resistance R.sub.fb. The critical wires being tested must be a signal wire series connected to a resistance R.sub.s, which is in turn series connected to a return wire. A test voltage source is connected to the noninverting input of the differential amplifier. The signal wire is connected to the inverting input of the differential amplifier. The test voltage source is activated by a test control unit. When activated, the test voltage source provides two distinct outputs allowing computation of a test gain in the presence of other functional signals. The test control unit measures the output V.sub.out of the differential amplifier and computes the value of the test gain. A break in either the signal wire or the return wire will result in a test gain of 1. If the signal and return wires are shorted, the test gain will be 1+R.sub.fb /R.sub.in. If the wires are undamaged, the test gain will be 1+R.sub.fb /(R.sub.in +R.sub. s). The test control unit then activates an appropriate output device in the event of a fault. In…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.