Source-switched charge pump circuit
US5532636A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 10, 1995 |
| Grant date | Jul 2, 1996 |
| Priority date | — |
| Expiry date | Mar 10, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0896
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A charge pump circuit suitable for use in a high frequency phase locked loop. The charge pump circuit comprises a biasing circuit, a charging transistor, a discharging transistor, and a pair of complementary switches. The charging transistor may be a p-channel field effect transistor (FET), and the discharging transistor may be a matched n-channel FET. The drains of the charging and discharging transistors are coupled together to form an output node for the charge pump circuit, and the biasing circuit provides a biasing voltage to the gates of the charging and discharging transistors. A first complementary switch is coupled in series between a supply voltage VCC and the source of the charging transistor. Similarly, a second complementary switch is coupled in series between system ground VSS and the source of the discharging transistor. A first pair of complementary control signals control the first complementary switch to switch on and off to provide positive current pulses at the output node, while a second pair of complementary control signals control the second complementary switch to switch on off to provide negative current pulses at the output node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.