Method and apparatus for decoding digital video using parallel processing
US5532744A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 22, 1994 |
| Grant date | Jul 2, 1996 |
| Priority date | — |
| Expiry date | Aug 22, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/30
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method and decoder for decoding a hierarchically coded digital video bitstream which can process a high resolution television picture in real time and which is made, up of a number of individual decoder modules, connected in parallel, which each have less real time processing power than is necessary, but which when combined, have at least the necessary processing power needed to process the bitstream in real time. The decoder includes a system controller which detects the hierarchical code indicating bits and slices and communicates this information to a slice parser which dynamically allocates the bitstream among the digital modules as needed on a per slice basis.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.