Distributed silicon controlled rectifiers for ESD protection
US5532896A · kind A · utility
Inventors
Key dates
| Filing date | Apr 26, 1994 |
| Grant date | Jul 2, 1996 |
| Priority date | — |
| Expiry date | Apr 26, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H9/046
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An electrostatic discharge (ESD) protection circuit for integrated circuitry having a switching ground bus for isolating switching noise includes an ESD protection bus. A first transistor pair includes a PNP transistor and an NPN transistor, with each of the transistors having an emitter connected to a signal input/output pad. A second transistor pair has a PNP transistor and an NPN transistor having emitters connected to the switching ground bus. For each of the PNP transistors, the base is connected to the ESD protection bus and the collector is connected to a "clean" ground bus. For each of the NPN transistors, a base is connected to the clean ground bus and a collector is connected to the ESD protection bus. In this configuration, the PNP of one transistor pair and the NPN of the other transistor pair are able to operate as a distributed silicon controlled rectifier to protect a drive transistor during an ESD event. Optionally, a switching V.sub.DD bus may also be incorporated and a third transistor pair having emitters coupled to the switching V.sub.DD bus may be employed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.