Process of providing uniform photoresist thickness on an opto-electronic device
US5534442A · kind A · utility
19Cited by
7References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 6, 1994 |
| Grant date | Jul 9, 1996 |
| Priority date | — |
| Expiry date | Oct 6, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19043
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for use in manufacturing opto-electronic components in opto-electronic hybrid module form. V-grooves (42) are provided by anisotropic etching techniques in a silicon substrate (41). Electrical ground planes (43) and interconnects (46, 49) are provided on dielectric layers (44, 50) with interconnections between them by way of vias (45, 51). Solder wettable pads (52) are provided on the outermost dielectric layer (50). Solder bumps (54) for use in a flip-chip bonding technique are provided by a wet forward technique. Components such as a laser array (30) are bonded to the solder bumps in accurate alignment therewith.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.