On screen display arrangement for digital video signal processing system
US5534942A · kind A · utility
53Cited by
2References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 15, 1995 |
| Grant date | Jul 9, 1996 |
| Priority date | — |
| Expiry date | Feb 15, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N11/20
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A digital video signal processing system receives encoded packets of data representing video image information in compressed form. A video decoder and an associated video RAM are used to decode and decompress the video packets to form groups of video image representative digital words. The video decoder also includes an on-screen display (OSD) unit which converts a graphics bit map stored in a section of the video RAM to groups of graphic image representative digital words. The image representative digital words and the graphic representative digital words are multiplexed together under the control of the OSD display unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.