Method for producing a semiconductor device using logic simulation approach to simulate a multi-peak resonant tunneling diode-based electronic circuit and a large signal multi-peak resonant tunneling diode spice model employed therefore
US5535146A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 27, 1995 |
| Grant date | Jul 9, 1996 |
| Priority date | — |
| Expiry date | Apr 27, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/36
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a method for producing a semiconductor device using a logic simulation approach, a circuit model for a user-specified design of a multi-peak resonant tunneling diode-based electronic circuit is provided and includes a plurality of circuit devices. One of the circuit devices is a multi-peak resonant tunneling diode which is modeled by a parasitic resistance in series with parallel combination of a voltage-controlled current source and an intrinsic capacitance. The voltage-controlled current source has an equivalent circuit model with a function stage for realizing current-voltage characteristic curve of the resonant tunneling diode. The function stage includes parallel combination of at least one first circuit branch, at least one second circuit branch and a third circuit branch. Each of the first and second circuit branches has a resistor, a diode and a voltage source. The third circuit branch has a resistor and a voltage source. The first and third circuit branches represent positive resistance sections, and the second and third circuit branches represent negative resistance sections of the current-voltage characteristic curve.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.