Processor chip for parallel processing system
US5535408A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 2, 1994 |
| Grant date | Jul 9, 1996 |
| Priority date | — |
| Expiry date | May 2, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/803
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A monolithic processing chip for a parallel processing system comprises a processor circuit and a memory circuit. The processor circuit processes data received from said associated memory circuit in accordance with processor control signals to generate processed data. The memory circuit includes a plurality of registers for storing data, each register including at least one data storage cell including at least one dynamic memory data bit store for storing a data bit. The memory circuit is responsive to memory control signals and register address signals to transmit stored data from the registers to the processor for processing and to store processed data received from the processor circuit in the register identified by the register address signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.