Package for integrated circuits
US5536906A · kind A · utility
16Cited by
9References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 23, 1993 |
| Grant date | Jul 16, 1996 |
| Priority date | — |
| Expiry date | Jul 23, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30111
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one form of the invention, a package for integrated circuits and devices (42), (46) is disclosed, the package including: a package base (44), the base having a first top surface; a layer of material (43) on the first top surface of the base (44) wherein the material (43) is patterned to cover a portion of the base, and wherein the layer of material (43) forms a substrate having a second top surface; a microstrip transmission line (45) on the second top surface; and a plastic encapsulant (50), wherein the encapsulant covers the first top surface of the base.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.