Polysilicon fuse array structure for integrated circuits
US5536968A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Aug 16, 1994 |
| Grant date | Jul 16, 1996 |
| Priority date | — |
| Expiry date | Aug 16, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A programmable read only memory (PROM) including an array of polysilicon fuse elements. The fuse array is formed within a semiconductor substrate including first and second patterned signal layers electrically insulated from one another. Each polysilicon fuse element within the array connects a first electrical conductor residing in the first patterned signal layer with a second electrical conductor residing in the second patterned signal layer. The polysilicon fuse element is in the form of a narrow strip and is folded in order to cause a current flowing through the clement to crowd, lowering the amount of current required to heat the fuse element to its melting point, i.e. the threshold current. The PROM is programmed by passing a threshold current through selected fuse elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.