Antifuse-based FPGA architecture without high-voltage isolation transistors
US5537056A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 30, 1994 |
| Grant date | Jul 16, 1996 |
| Priority date | — |
| Expiry date | Sep 30, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17704
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable interface for selectively making connections between an output node of a logic module and an interconnection array in a field programmable gate array integrated circuit includes a first antifuse having a first electrode electrically connected to the output node and a second electrode connected to the first electrode of a second a second antifuse. The second electrode or the second antifuse is connected to the interconnection array. A high-voltage transistor, capable of withstanding programming voltages used in the integrated circuit to program the antifuses, is connected between the common connection comprising the second electrode of the first antifuse and the first electrode of the second antifuse and a fixed voltage potential such as ground. A control element of the high-voltage transistor is connected to circuitry for programming antifuses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.