Programmable logic array device with grouped logic regions and three types of conductors
US5537057A · kind A · utility
280Cited by
25References
43Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 14, 1995 |
| Grant date | Jul 16, 1996 |
| Priority date | — |
| Expiry date | Feb 14, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17744
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable logic array device in which programmable logic regions are arranged in groups of four is provided. The device includes direct connect conductors for carrying signals totally within one group of four regions as well as to certain adjacent programmable logic regions, local conductors for carrying signals within groups and among adjacent groups, and global conductors for carrying device-wide signals. Connections among the various conductors, and between conductors and programmable logic regions, are provided to optimize the connection resources by avoiding switched conductor paths wherever possible.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.