Integrated semiconductor memory configuration

US5537352A · kind A · utility

Assignee

• Siemens Aktiengesellschaft · DE

Inventors

• Willibald Meyer · Hersbruck, DE
• Norbert Wirth · Unterschleißheim, DE

Key dates

• Filing date: Nov 14, 1994
• Grant date: Jul 16, 1996
• Expiry date: Nov 14, 2014

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C11/4096
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

An integrated semiconductor memory configuration includes a memory region having a plurality of segments. Each of the memory region segments have a plurality of read amplifiers and bit lines. Each two of the bit lines are connected to a respective one of the read amplifiers. A plurality of parallel data lines lead to the memory region. Each of the data lines have an end oriented toward and another end oriented away from a respective one of the memory region segments. Each of a plurality of read/write amplifier switches is disposed at one of the ends of the respective data lines. Each of a plurality of selector switches connects the read/write amplifier switch disposed on the end of a respective one of the data lines oriented toward the memory region segment to a respective one of the read amplifiers of the memory region segment.