Interface between unsynchronised devices
US5537557A · kind A · utility
5Cited by
4References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 27, 1994 |
| Grant date | Jul 16, 1996 |
| Priority date | — |
| Expiry date | Sep 27, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/423
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An interface between unsynchronised devices such as ASICs. The interface comprises a delay means which synchronises the write strobe of the first device with the system clock of the second device, thus enabling the transfer of data from the first device to the second device. The interface requires fewer gates per register in the second device than prior art interfaces.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.