Technique for accessing and refreshing memory locations within electronic storage devices which need to be refreshed with minimum power consumption
US5537564A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 8, 1993 |
| Grant date | Jul 16, 1996 |
| Priority date | — |
| Expiry date | Mar 8, 2013 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A technique for accessing and refreshing memory locations within a plurality of electronic storage devices which need to be refreshed is disclosed. The technique allows for the accessing of memory locations within the plurality of devices row-by-row such that all memory locations having the same row address within each of the devices are accessed before a memory location with a higher row address is accessed. This accessing technique is implemented through the use of a newly designed address decoder architecture. Once data is stored within the memory locations in this manner, the refreshing technique refreshes only those rows within the plurality of devices which contain data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.