Method and apparatus for a microprocessor to enter and exit a reduced power consumption state
US5537656A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 17, 1994 |
| Grant date | Jul 16, 1996 |
| Priority date | — |
| Expiry date | Jun 17, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3861
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for placing a microprocessor in and out of a reduced power consumption state utilizing system interrupts in a computer system. The method of the present invention intercepts instructions being executed by the processor before placing the processor in a reduced power consumption state. On a request for the processor to exit the reduced power consumption state, the method of the present inventions allows the processor to execute pre-determined resume instructions to wait out any voltage level fluctuations in the processor as it exits the reduced power consumption state, before allowing the processor to continue execution of the instructions intercepted prior to placing the processor in the reduced power consumption state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.