CMOS receiver circuit
US5539333A · kind A · utility
23Cited by
17References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 23, 1995 |
| Grant date | Jul 23, 1996 |
| Priority date | — |
| Expiry date | Jan 23, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/028
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A clock distribution system for a data processing system is implemented in CMOS technology wherein a full-swing differential clock signal is converted to a low-voltage swing differential clock signal by a driver's circuit and then returned to a full-swing differential clock signal at each receiver circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.